电子商务基础网站建设与维护单项选择题,wordpress 登录接口,怎样做当当网站代理,网站流量突然增加目录
一、概述
二、编译官方代码
三、移植
四、编译 一、概述 前面已经移植好了TF-A、optee、u-boot#xff0c;在u-boot能正常跑起来的情况下#xff0c;现在来移植内核。 二、编译官方代码 进入kernel目录
2.1 解压源码、打补丁
/* 解压源码 */
tar xf linux-6.1.28.…目录
一、概述
二、编译官方代码
三、移植
四、编译 一、概述 前面已经移植好了TF-A、optee、u-boot在u-boot能正常跑起来的情况下现在来移植内核。 二、编译官方代码 进入kernel目录
2.1 解压源码、打补丁
/* 解压源码 */
tar xf linux-6.1.28.tar.xz/* 进入源码目录 */
cd linux-6.1.28//* 打补丁 */
for p in ls -1 ../*.patch; do patch -p1 $p; done
2.2 配置Kernel 根据官方手册进行配置即可
/* 配置交叉编译器 */
source /opt/st/stm32mp1/4.2.1-openstlinux-6.1-yocto-mickledore-mp1-v23.06.21/environment-setup-cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabi /* 输出文件夹 */
export OUTPUT_BUILD_DIR$PWD/../build
mkdir -p ${OUTPUT_BUILD_DIR}/* 默认配置文件 */
make ARCHarm O${OUTPUT_BUILD_DIR} multi_v7_defconfig fragment*.config
2.3 编译内核 编译模块好像要好久可以不要编译
/* 编译uImage 设备树 */
make ARCHarm uImage vmlinux dtbs LOADADDR0xC2000040 O${OUTPUT_BUILD_DIR}/* 编译模块 */
make ARCHarm modules O${OUTPUT_BUILD_DIR}/* 配置输出文件路径 */
make ARCHarm INSTALL_MOD_PATH${OUTPUT_BUILD_DIR}/install_artifact modules_install O${OUTPUT_BUILD_DIR}
mkdir -p ${OUTPUT_BUILD_DIR}/install_artifact/boot//* 拷贝输出文件 */
cp ${OUTPUT_BUILD_DIR}/arch/arm/boot/uImage ${OUTPUT_BUILD_DIR}/install_artifact/boot/
cp ${OUTPUT_BUILD_DIR}/arch/arm/boot/dts/st*.dtb ${OUTPUT_BUILD_DIR}/install_artifact/boot/ 这时候去查看build/install_artifact目录下有boot和lib两个文件夹boot里有uImage和设备树lib里是内核模块 三、移植
3.1 复制文件
/* 进入设备树目录 */
cd arch/arm/boot/dts/cp stm32mp135f-dk.dts stm32mp135-atk.dts
cp stm32mp13-pinctrl.dtsi stm32mp135-pinctrl-atk.dtsi/* 回到源码根目录 */
cd ../../../../
3.2 修改头文件 打开stm32mp135-atk.dts把引脚头文件改成我们的
// #include stm32mp13-pinctrl.dtsi
#include stm32mp13-pinctrl-atk.dtsi
3.3 修改电源 首先找到scmi_regu节点全都干掉
// scmi_regu {
// scmi_vddcpu: voltd-vddcpu {
// reg VOLTD_SCMI_STPMIC1_BUCK1;
// regulator-name vddcpu;
// };
// scmi_vdd: voltd-vdd {
// reg VOLTD_SCMI_STPMIC1_BUCK3;
// regulator-name vdd;
// };
// scmi_vddcore: voltd-vddcore {
// reg VOLTD_SCMI_STPMIC1_BUCK4;
// regulator-name vddcore;
// };
// scmi_vdd_adc: voltd-vdd-adc {
// reg VOLTD_SCMI_STPMIC1_LDO1;
// regulator-name vdd_adc;
// };
// scmi_vdd_usb: voltd-vdd-usb {
// reg VOLTD_SCMI_STPMIC1_LDO4;
// regulator-name vdd_usb;
// };
// scmi_vdd_sd: voltd-vdd-sd {
// reg VOLTD_SCMI_STPMIC1_LDO5;
// regulator-name vdd_sd;
// };
// scmi_v1v8_periph: voltd-v1v8-periph {
// reg VOLTD_SCMI_STPMIC1_LDO6;
// regulator-name v1v8_periph;
// };
// scmi_v3v3_sw: voltd-v3v3-sw {
// reg VOLTD_SCMI_STPMIC1_PWR_SW2;
// regulator-name v3v3_sw;
// };
// }; 去根节点下添加我们对电源的描述找到v3v3_ao这个节点把它删了替换成我们的 // v3v3_ao: v3v3-ao {// compatible regulator-fixed;// regulator-name v3v3_ao;// regulator-min-microvolt 3300000;// regulator-max-microvolt 3300000;// regulator-always-on;// };
vddcore: vddcore {compatible regulator-fixed;regulator-name vddcore;regulator-min-microvolt 1250000;regulator-max-microvolt 1250000;regulator-off-in-suspend;regulator-always-on;};vddcpu: vddcpu {compatible regulator-fixed;regulator-name vddcpu;regulator-min-microvolt 1350000;regulator-max-microvolt 1350000;regulator-off-in-suspend;regulator-always-on;};v3v3: v3v3 {compatible regulator-fixed;regulator-name v3v3;regulator-min-microvolt 3300000;regulator-max-microvolt 3300000;regulator-off-in-suspend;regulator-always-on;};vbus_otg: vbus_otg {compatible regulator-fixed;regulator-name vbus_otg;regulator-min-microvolt 5000000;regulator-max-microvolt 5000000;regulator-off-in-suspend;regulator-always-on;};vdd: vdd {compatible regulator-fixed;regulator-name vdd;regulator-min-microvolt 3300000;regulator-max-microvolt 3300000;regulator-off-in-suspend;regulator-always-on;};vdd_usb: vdd_usb {compatible regulator-fixed;regulator-name vdd_usb;regulator-min-microvolt 3300000;regulator-max-microvolt 3300000;regulator-off-in-suspend;regulator-always-on;};v1v8_audio: regulator-v1v8_audio {compatible regulator-fixed;regulator-name v1v8_audio;regulator-min-microvolt 1800000;regulator-max-microvolt 1800000;regulator-always-on;regulator-boot-on;};v3v3_hdmi: regulator-v3v3-hdmi {compatible regulator-fixed;regulator-name v3v3_hdmi;regulator-min-microvolt 3300000;regulator-max-microvolt 3300000;regulator-always-on;regulator-boot-on;};v1v2_hdmi: regulator-v1v2-hdmi {compatible regulator-fixed;regulator-name v1v2_hdmi;regulator-min-microvolt 1200000;regulator-max-microvolt 1200000;regulator-always-on;regulator-boot-on;};
3.4 添加看门狗 由于笔者前面移植u-boot、optee、TF-A哪里遗忘了一个iwdg2正点原子使用的是iwdg2而ST官方使用的是arm_wdt如果前面用到了iwdg2那就在这里添加上如果没有则pass这一部分
iwdg2 {timeout-sec 32;status okay;
};
3.5 修改网络 找到eth1和eth2修改成正点原子的
eth1 {status okay;pinctrl-0 eth1_rgmii_pins_a;pinctrl-1 eth1_rgmii_sleep_pins_a;pinctrl-names default, sleep;phy-mode rgmii-id;max-speed 1000;phy-handle phy0_eth1;nvmem-cells ethernet_mac1_address;nvmem-cell-names mac-address;mdio1 {#address-cells 1;#size-cells 0;compatible snps,dwmac-mdio;phy0_eth1: ethernet-phy1 {reg 1;};};
};eth2 {status okay;pinctrl-0 eth2_rgmii_pins_a;pinctrl-1 eth2_rgmii_sleep_pins_a;pinctrl-names default, sleep;phy-mode rgmii-id;max-speed 1000;phy-handle phy0_eth2;phy-supply v3v3;nvmem-cells ethernet_mac2_address;nvmem-cell-names mac-address;mdio1 {#address-cells 1;#size-cells 0;compatible snps,dwmac-mdio;phy0_eth2: ethernet-phy2 {reg 2;};};
};
3.6 修改sdmmc 找到sdmmc1和sdmmc2修改成我们的
sdmmc1 {pinctrl-names default, opendrain, sleep;pinctrl-0 sdmmc1_b4_pins_a sdmmc1_clk_pins_a;pinctrl-1 sdmmc1_b4_od_pins_a sdmmc1_clk_pins_a;pinctrl-2 sdmmc1_b4_sleep_pins_a;cd-gpios gpiof 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP);st,neg-edge;no-1-8-v;bus-width 4;vmmc-supply v3v3;#address-cells 1;#size-cells 0;status okay;
};/* EMMC */
sdmmc2 {pinctrl-names default, opendrain, sleep;pinctrl-0 sdmmc2_b4_pins_a sdmmc2_b4_b7_pins_a sdmmc2_clk_pins_a;pinctrl-1 sdmmc2_b4_od_pins_a sdmmc2_b4_b7_od_pins_a sdmmc2_clk_pins_a;pinctrl-2 sdmmc2_b4_sleep_pins_a sdmmc2_b4_b7_sleep_pins_a;non-removable;st,neg-edge;mmc-ddr-3_3v;no-1-8-v;bus-width 8;vmmc-supply v3v3;keep-power-in-suspend;#address-cells 1;#size-cells 0;status okay;
};
3.7 删掉其它 如果根文件系统是在emmc里只需要修改一个sdmmc2能用就行如果根文件系统需要通过nfs挂载那就需要修改eth1和eth2节点。而对于其他部分USB、OTG、LCD等外设都是可以删除的这些都是正点原子会讲会移植的东西所以笔者在这里把不需要的外设全部移除 1. usbh_ehci、usbotg_hs、usbphyc、usbphyc_port0、usbphyc_port1 2. usart1、 usart2、uart8 3. timers3、timers4、timers8、timers14 4. spi5 5. rtc 6. ltdc 7. i2c1、i2c5 8. dcmipp 9. adc1 10. 根节点下gpio-keys、leds、panel_backlight、panel_rgb、wake_up、wifi_pwrseq 删除之后可以得到一个相对精简的设备树
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/** Copyright (C) STMicroelectronics 2021 - All Rights Reserved* Author: Alexandre Torgue alexandre.torguefoss.st.com for STMicroelectronics.*//dts-v1/;#include dt-bindings/gpio/gpio.h
#include dt-bindings/input/input.h
#include dt-bindings/leds/common.h
#include dt-bindings/regulator/st,stm32mp13-regulator.h
#include dt-bindings/rtc/rtc-stm32.h
#include stm32mp135.dtsi
#include stm32mp13xf.dtsi
#include stm32mp13-pinctrl-atk.dtsi/ {model ATK STM32MP135-ATK Discovery Board;compatible st,stm32mp135-ATK, st,stm32mp135;aliases {ethernet0 eth1;ethernet1 eth2;serial0 uart4;};chosen {stdout-path serial0:115200n8;#address-cells 1;#size-cells 1;ranges;framebuffer {compatible simple-framebuffer;clocks rcc LTDC_PX;status disabled;};};clocks {clk_ext_camera: clk-ext-camera {#clock-cells 0;compatible fixed-clock;clock-frequency 24000000;};clk_mco1: clk-mco1 {#clock-cells 0;compatible fixed-clock;clock-frequency 24000000;};};memoryc0000000 {device_type memory;reg 0xc0000000 0x20000000;};reserved-memory {#address-cells 1;#size-cells 1;ranges;opteedd000000 {reg 0xdd000000 0x3000000;no-map;};};vddcore: vddcore {compatible regulator-fixed;regulator-name vddcore;regulator-min-microvolt 1250000;regulator-max-microvolt 1250000;regulator-off-in-suspend;regulator-always-on;};vddcpu: vddcpu {compatible regulator-fixed;regulator-name vddcpu;regulator-min-microvolt 1350000;regulator-max-microvolt 1350000;regulator-off-in-suspend;regulator-always-on;};v3v3: v3v3 {compatible regulator-fixed;regulator-name v3v3;regulator-min-microvolt 3300000;regulator-max-microvolt 3300000;regulator-off-in-suspend;regulator-always-on;};vbus_otg: vbus_otg {compatible regulator-fixed;regulator-name vbus_otg;regulator-min-microvolt 5000000;regulator-max-microvolt 5000000;regulator-off-in-suspend;regulator-always-on;};vdd: vdd {compatible regulator-fixed;regulator-name vdd;regulator-min-microvolt 3300000;regulator-max-microvolt 3300000;regulator-off-in-suspend;regulator-always-on;};vdd_usb: vdd_usb {compatible regulator-fixed;regulator-name vdd_usb;regulator-min-microvolt 3300000;regulator-max-microvolt 3300000;regulator-off-in-suspend;regulator-always-on;};v1v8_audio: regulator-v1v8_audio {compatible regulator-fixed;regulator-name v1v8_audio;regulator-min-microvolt 1800000;regulator-max-microvolt 1800000;regulator-always-on;regulator-boot-on;};v3v3_hdmi: regulator-v3v3-hdmi {compatible regulator-fixed;regulator-name v3v3_hdmi;regulator-min-microvolt 3300000;regulator-max-microvolt 3300000;regulator-always-on;regulator-boot-on;};v1v2_hdmi: regulator-v1v2-hdmi {compatible regulator-fixed;regulator-name v1v2_hdmi;regulator-min-microvolt 1200000;regulator-max-microvolt 1200000;regulator-always-on;regulator-boot-on;};
};iwdg2 {timeout-sec 32;status okay;
};arm_wdt {timeout-sec 32;status okay;
};crc1 {status okay;
};cryp {status okay;
};dts {status okay;
};eth1 {status okay;pinctrl-0 eth1_rgmii_pins_a;pinctrl-1 eth1_rgmii_sleep_pins_a;pinctrl-names default, sleep;phy-mode rgmii-id;max-speed 1000;phy-handle phy0_eth1;nvmem-cells ethernet_mac1_address;nvmem-cell-names mac-address;mdio1 {#address-cells 1;#size-cells 0;compatible snps,dwmac-mdio;phy0_eth1: ethernet-phy1 {reg 1;};};
};eth2 {status okay;pinctrl-0 eth2_rgmii_pins_a;pinctrl-1 eth2_rgmii_sleep_pins_a;pinctrl-names default, sleep;phy-mode rgmii-id;max-speed 1000;phy-handle phy0_eth2;phy-supply v3v3;nvmem-cells ethernet_mac2_address;nvmem-cell-names mac-address;mdio1 {#address-cells 1;#size-cells 0;compatible snps,dwmac-mdio;phy0_eth2: ethernet-phy2 {reg 2;};};
};sdmmc1 {pinctrl-names default, opendrain, sleep;pinctrl-0 sdmmc1_b4_pins_a sdmmc1_clk_pins_a;pinctrl-1 sdmmc1_b4_od_pins_a sdmmc1_clk_pins_a;pinctrl-2 sdmmc1_b4_sleep_pins_a;cd-gpios gpiof 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP);st,neg-edge;no-1-8-v;bus-width 4;vmmc-supply v3v3;#address-cells 1;#size-cells 0;status okay;
};/* EMMC */
sdmmc2 {pinctrl-names default, opendrain, sleep;pinctrl-0 sdmmc2_b4_pins_a sdmmc2_b4_b7_pins_a sdmmc2_clk_pins_a;pinctrl-1 sdmmc2_b4_od_pins_a sdmmc2_b4_b7_od_pins_a sdmmc2_clk_pins_a;pinctrl-2 sdmmc2_b4_sleep_pins_a sdmmc2_b4_b7_sleep_pins_a;non-removable;st,neg-edge;mmc-ddr-3_3v;no-1-8-v;bus-width 8;vmmc-supply v3v3;keep-power-in-suspend;#address-cells 1;#size-cells 0;status okay;
};uart4 {pinctrl-names default, sleep, idle;pinctrl-0 uart4_pins_a;pinctrl-1 uart4_sleep_pins_a;pinctrl-2 uart4_idle_pins_a;/delete-property/dmas;/delete-property/dma-names;status okay;
};
3.8 修改引脚 由于前面删了很多无关外设引脚我们只需要复制原子的部分即可eth1、eth2、emmc1、emmc2
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/** Copyright (C) STMicroelectronics 2021 - All Rights Reserved* Author: Alexandre Torgue alexandre.torguefoss.st.com*/
#include dt-bindings/pinctrl/stm32-pinfunc.hpinctrl {eth1_rgmii_pins_a: eth1-rgmii-1 {pins1 {pinmux STM32_PINMUX(F, 12, AF11), /* ETH1_RGMII_CLK125 */STM32_PINMUX(C, 1, AF11), /* ETH1_RGMII_GTX_CLK */STM32_PINMUX(G, 13, AF11), /* ETH1_RGMII_TXD0 */STM32_PINMUX(G, 14, AF11), /* ETH1_RGMII_TXD1 */STM32_PINMUX(C, 2, AF11), /* ETH1_RGMII_TXD2 */STM32_PINMUX(E, 5, AF10), /* ETH1_RGMII_TXD3 */STM32_PINMUX(B, 11, AF11), /* ETH1_RGMII_TX_CTL */STM32_PINMUX(A, 2, AF11), /* ETH1_MDIO */STM32_PINMUX(G, 2, AF11); /* ETH1_MDC */bias-disable;drive-push-pull;slew-rate 2;};pins2 {pinmux STM32_PINMUX(C, 4, AF11), /* ETH1_RGMII_RXD0 */STM32_PINMUX(C, 5, AF11), /* ETH1_RGMII_RXD1 */STM32_PINMUX(B, 0, AF11), /* ETH1_RGMII_RXD2 */STM32_PINMUX(B, 1, AF11), /* ETH1_RGMII_RXD3 */STM32_PINMUX(A, 1, AF11), /* ETH1_RGMII_RX_CLK */STM32_PINMUX(A, 7, AF11); /* ETH1_RGMII_RX_CTL */bias-disable;};};eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-1 {pins1 {pinmux STM32_PINMUX(F, 12, ANALOG), /* ETH1_RGMII_CLK125 */STM32_PINMUX(C, 1, ANALOG), /* ETH1_RGMII_GTX_CLK */STM32_PINMUX(G, 13, ANALOG), /* ETH1_RGMII_TXD0 */STM32_PINMUX(G, 14, ANALOG), /* ETH1_RGMII_TXD1 */STM32_PINMUX(C, 2, ANALOG), /* ETH1_RGMII_TXD2 */STM32_PINMUX(E, 5, ANALOG), /* ETH1_RGMII_TXD3 */STM32_PINMUX(B, 11, ANALOG), /* ETH1_RGMII_TX_CTL */STM32_PINMUX(A, 2, ANALOG), /* ETH1_MDIO */STM32_PINMUX(G, 2, ANALOG), /* ETH1_MDC */STM32_PINMUX(C, 4, ANALOG), /* ETH1_RGMII_RXD0 */STM32_PINMUX(C, 5, ANALOG), /* ETH1_RGMII_RXD1 */STM32_PINMUX(B, 0, ANALOG), /* ETH1_RGMII_RXD2 */STM32_PINMUX(B, 1, ANALOG), /* ETH1_RGMII_RXD3 */STM32_PINMUX(A, 1, ANALOG), /* ETH1_RGMII_RX_CLK */STM32_PINMUX(A, 7, ANALOG); /* ETH1_RGMII_RX_CTL */};};eth2_rgmii_pins_a: eth2-rgmii-2 {pins1 {pinmux STM32_PINMUX(H, 2, AF13), /* ETH2_RGMII_CLK125 */STM32_PINMUX(F, 7, AF11), /* ETH2_RGMII_TXD0 */STM32_PINMUX(G, 11, AF10), /* ETH2_RGMII_TXD1 */STM32_PINMUX(G, 1, AF10), /* ETH2_RGMII_TXD2 */STM32_PINMUX(E, 6, AF11), /* ETH2_RGMII_TXD3 */STM32_PINMUX(G, 3, AF10), /* ETH2_RGMII_GTX_CLK */STM32_PINMUX(F, 6, AF11), /* ETH2_RGMII_TX_CTL */STM32_PINMUX(B, 2, AF11), /* ETH2_MDIO */STM32_PINMUX(G, 5, AF10); /* ETH2_MDC */bias-disable;drive-push-pull;slew-rate 2;};pins2 {pinmux STM32_PINMUX(F, 4, AF11), /* ETH2_RGMII_RXD0 */STM32_PINMUX(E, 2, AF10), /* ETH2_RGMII_RXD1 */STM32_PINMUX(H, 6, AF12), /* ETH2_RGMII_RXD2 */STM32_PINMUX(A, 8, AF11), /* ETH2_RGMII_RXD3 */STM32_PINMUX(H, 11, AF11), /* ETH2_RGMII_RX_CLK */STM32_PINMUX(G, 12, AF12); /* ETH2_RGMII_RX_CTL */bias-disable;};};eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-2 {pins1 {pinmux STM32_PINMUX(H, 2, ANALOG), /* ETH2_RGMII_CLK125 */STM32_PINMUX(F, 7, ANALOG), /* ETH2_RGMII_TXD0 */STM32_PINMUX(G, 11, ANALOG), /* ETH2_RGMII_TXD1 */STM32_PINMUX(G, 1, ANALOG), /* ETH2_RGMII_TXD2 */STM32_PINMUX(E, 6, ANALOG), /* ETH2_RGMII_TXD3 */STM32_PINMUX(G, 3, ANALOG), /* ETH2_RGMII_GTX_CLK */STM32_PINMUX(F, 6, ANALOG), /* ETH2_RGMII_TX_CTL */STM32_PINMUX(B, 2, ANALOG), /* ETH2_MDIO */STM32_PINMUX(G, 5, ANALOG), /* ETH2_MDC */STM32_PINMUX(F, 4, ANALOG), /* ETH2_RGMII_RXD0 */STM32_PINMUX(E, 2, ANALOG), /* ETH2_RGMII_RXD1 */STM32_PINMUX(H, 6, ANALOG), /* ETH2_RGMII_RXD2 */STM32_PINMUX(A, 8, ANALOG), /* ETH2_RGMII_RXD3 */STM32_PINMUX(H, 11, ANALOG), /* ETH2_RGMII_RX_CLK */STM32_PINMUX(G, 12, ANALOG); /* ETH2_RGMII_RX_CTL */};};sdmmc1_b4_pins_a: sdmmc1-b4-0 {pins {pinmux STM32_PINMUX(C, 8, AF12), /* SDMMC1_D0 */STM32_PINMUX(C, 9, AF12), /* SDMMC1_D1 */STM32_PINMUX(C, 10, AF12), /* SDMMC1_D2 */STM32_PINMUX(C, 11, AF12), /* SDMMC1_D3 */STM32_PINMUX(D, 2, AF12); /* SDMMC1_CMD */slew-rate 1;drive-push-pull;bias-disable;};};sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {pins1 {pinmux STM32_PINMUX(C, 8, AF12), /* SDMMC1_D0 */STM32_PINMUX(C, 9, AF12), /* SDMMC1_D1 */STM32_PINMUX(C, 10, AF12), /* SDMMC1_D2 */STM32_PINMUX(C, 11, AF12); /* SDMMC1_D3 */slew-rate 1;drive-push-pull;bias-disable;};pins2 {pinmux STM32_PINMUX(D, 2, AF12); /* SDMMC1_CMD */slew-rate 1;drive-open-drain;bias-disable;};};sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {pins {pinmux STM32_PINMUX(C, 8, ANALOG), /* SDMMC1_D0 */STM32_PINMUX(C, 9, ANALOG), /* SDMMC1_D1 */STM32_PINMUX(C, 10, ANALOG), /* SDMMC1_D2 */STM32_PINMUX(C, 11, ANALOG), /* SDMMC1_D3 */STM32_PINMUX(C, 12, ANALOG), /* SDMMC1_CK */STM32_PINMUX(D, 2, ANALOG); /* SDMMC1_CMD */};};sdmmc1_clk_pins_a: sdmmc1-clk-0 {pins {pinmux STM32_PINMUX(C, 12, AF12); /* SDMMC1_CK */slew-rate 1;drive-push-pull;bias-disable;};};sdmmc2_b4_pins_a: sdmmc2-b4-0 {pins {pinmux STM32_PINMUX(B, 14, AF10), /* SDMMC2_D0 */STM32_PINMUX(B, 15, AF10), /* SDMMC2_D1 */STM32_PINMUX(B, 3, AF10), /* SDMMC2_D2 */STM32_PINMUX(B, 4, AF10), /* SDMMC2_D3 */STM32_PINMUX(G, 6, AF10); /* SDMMC2_CMD */slew-rate 1;drive-push-pull;bias-pull-up;};};sdmmc2_b4_b7_pins_a: sdmmc2-b4-b7-0 {pins {pinmux STM32_PINMUX(F, 0, AF10), /* SDMMC2_D4 */STM32_PINMUX(B, 9, AF10), /* SDMMC2_D5 */STM32_PINMUX(C, 6, AF10), /* SDMMC2_D6 */ STM32_PINMUX(C, 7, AF10); /* SDMMC2_D7 */slew-rate 1;drive-push-pull;bias-pull-up;};};sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {pins1 {pinmux STM32_PINMUX(B, 14, AF10), /* SDMMC2_D0 */STM32_PINMUX(B, 15, AF10), /* SDMMC2_D1 */STM32_PINMUX(B, 3, AF10), /* SDMMC2_D2 */STM32_PINMUX(B, 4, AF10); /* SDMMC2_D3 */slew-rate 1;drive-push-pull;bias-pull-up;};pins2 {pinmux STM32_PINMUX(G, 6, AF10); /* SDMMC2_CMD */slew-rate 1;drive-open-drain;bias-pull-up;};};sdmmc2_b4_b7_od_pins_a: sdmmc2-b4-b7-od-0 {pins {pinmux STM32_PINMUX(F, 0, AF10), /* SDMMC2_D4 */STM32_PINMUX(B, 9, AF10), /* SDMMC2_D5 */STM32_PINMUX(C, 6, AF10), /* SDMMC2_D6 */ STM32_PINMUX(C, 7, AF10); /* SDMMC2_D7 */slew-rate 1;drive-push-pull;bias-pull-up;};}; sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {pins {pinmux STM32_PINMUX(B, 14, ANALOG), /* SDMMC2_D0 */STM32_PINMUX(B, 15, ANALOG), /* SDMMC2_D1 */STM32_PINMUX(B, 3, ANALOG), /* SDMMC2_D2 */STM32_PINMUX(B, 4, ANALOG), /* SDMMC2_D3 */STM32_PINMUX(E, 3, ANALOG), /* SDMMC2_CK */STM32_PINMUX(G, 6, ANALOG); /* SDMMC2_CMD */};};sdmmc2_b4_b7_sleep_pins_a: sdmmc2-b4-b7-sleep-0 {pins {pinmux STM32_PINMUX(F, 0, ANALOG), /* SDMMC2_D4 */STM32_PINMUX(B, 9, ANALOG), /* SDMMC2_D5 */STM32_PINMUX(C, 6, ANALOG), /* SDMMC2_D6 */ STM32_PINMUX(C, 7, ANALOG); /* SDMMC2_D7 */};};sdmmc2_clk_pins_a: sdmmc2-clk-0 {pins {pinmux STM32_PINMUX(E, 3, AF10); /* SDMMC2_CK */slew-rate 1;drive-push-pull;bias-pull-up;};};uart4_pins_a: uart4-0 {pins1 {pinmux STM32_PINMUX(D, 6, AF8); /* UART4_TX */bias-disable;drive-push-pull;slew-rate 0;};pins2 {pinmux STM32_PINMUX(D, 8, AF8); /* UART4_RX */bias-pull-up;};};uart4_idle_pins_a: uart4-idle-0 {pins1 {pinmux STM32_PINMUX(D, 6, ANALOG); /* UART4_TX */};pins2 {pinmux STM32_PINMUX(D, 8, AF8); /* UART4_RX */bias-pull-up;};};uart4_sleep_pins_a: uart4-sleep-0 {pins {pinmux STM32_PINMUX(D, 6, ANALOG), /* UART4_TX */STM32_PINMUX(D, 8, ANALOG); /* UART4_RX */};};
};3.9 修改Makefile 在源码目录下arch/arm/boot/dts/这个目录里有一个Makefile找到里面的stm32
dtb-$(CONFIG_ARCH_STM32) \stm32f429-disco.dtb \stm32f469-disco.dtb \stm32f746-disco.dtb \stm32f769-disco.dtb \stm32429i-eval.dtb \stm32746g-eval.dtb \stm32h743i-eval.dtb \stm32h743i-disco.dtb \stm32h750i-art-pi.dtb \stm32mp135f-dk.dtb \stm32mp135f-dk-a7-examples.dtb \stm32mp151a-prtt1a.dtb \stm32mp151a-prtt1c.dtb \stm32mp151a-prtt1s.dtb \stm32mp153c-dhcom-drc02.dtb \stm32mp153c-dhcor-drc-compact.dtb \stm32mp157a-avenger96.dtb \stm32mp157a-dhcor-avenger96.dtb \stm32mp157a-dk1.dtb \stm32mp157a-dk1-a7-examples.dtb \stm32mp157a-dk1-m4-examples.dtb \stm32mp157a-ed1.dtb \stm32mp157a-ev1.dtb \stm32mp157a-ev1-a7-examples.dtb \stm32mp157a-ev1-m4-examples.dtb \stm32mp157a-iot-box.dtb \stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \stm32mp157a-icore-stm32mp1-ctouch2.dtb \stm32mp157a-icore-stm32mp1-ctouch2-of10.dtb \stm32mp157a-icore-stm32mp1-edimm2.2.dtb \stm32mp157a-stinger96.dtb \stm32mp157c-dhcom-pdk2.dtb \stm32mp157c-dhcom-picoitx.dtb \stm32mp157c-dk2.dtb \stm32mp157c-dk2-a7-examples.dtb \stm32mp157c-dk2-m4-examples.dtb \stm32mp157c-ed1.dtb \stm32mp157c-emsbc-argon.dtb \stm32mp157c-ev1.dtb \stm32mp157c-ev1-a7-examples.dtb \stm32mp157c-ev1-m4-examples.dtb \stm32mp157c-lxa-mc1.dtb \stm32mp157c-odyssey.dtb \stm32mp157d-dk1.dtb \stm32mp157d-dk1-a7-examples.dtb \stm32mp157d-dk1-m4-examples.dtb \stm32mp157d-ed1.dtb \stm32mp157d-ev1.dtb \stm32mp157d-ev1-a7-examples.dtb \stm32mp157d-ev1-m4-examples.dtb \stm32mp157f-dk2.dtb \stm32mp157f-dk2-a7-examples.dtb \stm32mp157f-dk2-m4-examples.dtb \stm32mp157f-ed1.dtb \stm32mp157f-ev1.dtb \stm32mp157f-ev1-a7-examples.dtb \stm32mp157f-ev1-m4-examples.dtb \ 添加上我们的设备树或者全删了只留我们自己的设备树
dtb-$(CONFIG_ARCH_STM32) \stm32mp135-atk.dtb
至此内核所需要修改的文件已全部完成。 四、编译
4.1 配置内核 在这里笔者遇到一个问题内核编译后直接跑会提示无法修改CPU主频然后上网找到了需要配置内核
/* 打开Linux图形化配置界面 */
make ARCHarm O${OUTPUT_BUILD_DIR} menuconfig -CPU Power Management -CPU Frequency scaling -[*] CPU frequency transition statistics - Default CPUFreq governor(userspace) 把CPUFreq改为userspace这个选项
cp ../build/.config arch/arm/configs/stm32mp135_atk_defconfig 把配置文件保存为我们的默认配置文件以便下次使用
4.2 编译
/* 编译内核、设备树 */
make ARCHarm uImage vmlinux dtbs LOADADDR0xC2000040 O${OUTPUT_BUILD_DIR}/* 复制文件到输出文件夹 */
cp ${OUTPUT_BUILD_DIR}/arch/arm/boot/uImage ${OUTPUT_BUILD_DIR}/install_artifact/boot/
cp ${OUTPUT_BUILD_DIR}/arch/arm/boot/dts/st*.dtb ${OUTPUT_BUILD_DIR}/install_artifact/boot/ 这时候查看build/install_artifact/boot文件夹会发现有刚刚编译好的uImage和stm32mp135-atk.dtb剩下的烧写就就可以根据原子的详细教程就行了
4.3 nfs挂载根文件系统 这里可能有个小小的坑在设备树中ethernet0是eth1ethernet1是eth2所以用nfs挂根文件系统的时候应该选eth0或eth1。反正大家可以多尝试几个。 笔者用tftp和nfs启动内核
setenv bootcmd tftp c2000000 uImage;tftp c4000000 stm32mp135-atk.dtb;bootm c2000000 - c4000000
setenv bootargs consolettySTM0,115200 root/dev/nfs nfsroot192.168.1.2:/home/zhangrl/Linux/nfs/rootfs,prototcp rw ip192.168.1.3:192.168.1.2:192.168.1.1:255.255.255.0::eth1:off
4.4 emmc挂根文件系统 烧写到emmc中的时候先去uboot里查看自己的内核在emmc的哪一个分区rootfs在哪一个分区 使用ext4ls命令对一个一个分区进行扫描直到看到自己的分区笔者只会这个笨方法 ext4ls: 第一个参数mmc设备选择mmc设备 第二个参数1选择mmc1就是我们的emmc 第三个参数选择分区一个一个试 知道自己的分区之后就可以该bootcmd和bootargs:
setenv bootcmd ext4load mmc 1:6 c2000000 uImage;ext4load mmc 1:6 c4000000 stm32mp135-atk.dtb;bootm c2000000 - c4000000
setenv bootargs consolettySTM0,115200 root/dev/mmcblk1p7 rootwait rw 至此STM32MP135的全套移植教程完成补上了正点原子的空白剩下的根文件系统直接跟正点原子的教程即可使用buildroot和busybox都可以。笔者今年刚学Linux从i.mx6ull学完过来对Linux的理解可能并不到位 如果文章有错误希望大家指正
