烟台网站建设力推企汇互联见效付款,在线视频教学网站建设,个人网页模板网站,dw网页制作实训总结环境#xff1a;硬件#xff1a;PC机ARM仿真器v8.00已下载好bit流的Xinlinx SoC开发板(其上有arm cortex-a9核)软件#xff1a;Redhat Linux6(或虚拟机) openocd使用openocd下载程序#xff0c;调试arm cortex-a9核。一、openocd安装下载libusb库安装或直接yum install li…环境硬件PC机ARM仿真器v8.00已下载好bit流的Xinlinx SoC开发板(其上有arm cortex-a9核)软件Redhat Linux6(或虚拟机) openocd使用openocd下载程序调试arm cortex-a9核。一、openocd安装下载libusb库安装或直接yum install libusb*下载openocd-0.10.0.ziphttps://sourceforge.net/projects/openocd/解压进入目录$ ./configure --prefix/home/benben/openocd --enable-jlink$ make #若编译有错根据提示信息修改$ sudo make install二、openocd使用$ lsusb能查到仿真器usb信息...$ openocd -f em8302_jtag.cfg(其中引用了jlink.cfg与v7arm.cfg) #连接开发板打印出一些无Error的信息...$ telnet localhost 4444 #启动守护程序 resume 0 #从0地址开始运行 halt #暂停cpu mdw 0 12 #从0地址读12个数(32位)mww 地址 写的数 #向某地址写数(32位)reg #查看寄存器em8302_jtag.cfg内容# The 8301 Board use jlink to Debugsource [find interface/jlink.cfg]transport select jtag# THe 8301 Board use a single v7arm chipsource [find target/v7arm.cfg]echo 8302 Board Loaded.# Set reset type and may be changed in some particular casesreset_config trst_only#reset_config separate#reset_config trst_open_drain srst_open_drainadapter_khz 200# Wait after deasserting nTRST before starting new JTAG operations#jtag_ntrst_delay 200jlink.cfg内容(指定类型为jlink)## Segger J-Link## http://www.segger.com/jlink.html#interface jlink# The serial number can be used to select a specific interface in case more than one# is connected to the host.## Segger software omits leading zeros in serial number displays,# OpenOCD requires them.## Example: Select J-Link with serial 123456789## jlink serial 000123456789v7arm.cfg(指定cpu信息)if { [info exists CHIPNAME] } {set _CHIPNAME $CHIPNAME} else {set _CHIPNAME ecictv7}# CoreSight Debug Access Portif { [info exists DAP_TAPID] } {set _DAP_TAPID $DAP_TAPID} else {set _DAP_TAPID 0x4ba00477}jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x01 -irmask 0x0f \-expected-id $_DAP_TAPID## Cortex A9 target## GDB target: Cortex-A9, using DAP, configuring only one core# Base addresses of cores:# core 0 - 0x1fffc000# core 1 - 0x2fffc000set _TARGETNAME1 $_CHIPNAME.cpu.0set _TARGETNAME2 $_CHIPNAME.cpu.1# A9 core 0target create $_TARGETNAME1 cortex_a -chain-position $_CHIPNAME.dap \-coreid 0 -dbgbase 0x80090000# -coreid 0 -dbgbase 0xc0000000#$_TARGETNAME1 configure -work-area-phys 0x80000000 -work-area-size 8096$_TARGETNAME1 configure -event reset-start { adapter_khz 50 }#$_TARGETNAME1 configure -event reset-assert-post cycv_dbginit $_TARGETNAME1$_TARGETNAME1 configure -event gdb-attach { halt }#smp mode cannot halt only one cpu core, have no idea, by yzq# A9 core 1#target create $_TARGETNAME2 cortex_a -chain-position $_CHIPNAME.dap \# -coreid 1 -dbgbase 0xc0002000#$_TARGETNAME2 configure -event reset-start { adapter_khz 1000 }#$_TARGETNAME2 configure -event reset-assert-post cycv_dbginit $_TARGETNAME2#$_TARGETNAME2 configure -event gdb-attach { halt }#target smp $_CHIPNAME.cpu.1 $_CHIPNAME.cpu.0proc cycv_dbginit {target} {# General Cortex A8/A9 debug initialisationcortex_a dbginit}
